SBE HighWire HW400c/2 Specifications

HW400p/MA High-Performance PCI Communications ControllerTechnical Reference, Rev. 1.0, March 6, 2002Primary Text Number M8239SBE, Inc.SBE, Inc.SBE, In

10 HW400p/M Introduction HW400p/M Technical Reference - 1.0, March 6, 2002Figure 2-1 HW400p/M functional block diagram

HW400p/M Technical Reference - 1.0, March 6, 2002 Processor 113. SpecificationsThis chapter details the physical characteristics and specification

12 Specifications HW400p/M Technical Reference - 1.0, March 6, 20023-2. MemoryThe HW400p/M contains a variety of memory devices for use by the MPC

HW400p/M Technical Reference - 1.0, March 6, 2002 I/O 133-3. I/ODUART The Exar ST16C2550 Dual Universal Asynchronous Receiver/Transmitter (DUART)

14 Specifications HW400p/M Technical Reference - 1.0, March 6, 20023-4. Operating RequirementsCaution! Bring the HW400p/M communications controlle

HW400p/M Technical Reference - 1.0, March 6, 2002 Physical Characteristics 153-6. Physical CharacteristicsTable 3-3 provides the HW400p/M board’s

16 Specifications HW400p/M Technical Reference - 1.0, March 6, 20023-7. Mean Time Between FailuresThe part failure source rate was calculated in a

HW400p/M Technical Reference - 1.0, March 6, 2002 Certifications 17TelecomCTR13 (includes CTR12 and ETS 300046; −2.048 Mbit/s structured 120 ohm)

18 Specifications HW400p/M Technical Reference - 1.0, March 6, 2002Industry Canada CS03 PENDINGNote: The Industry Canada label identifies certifie

HW400p/M Technical Reference - 1.0, March 6, 2002 Software Support 193-10. Software Support Contact SBE for a list of software available for the H

2 HW400p/M Technical Reference - 1.0, March 6, 2002Copyright ©2002 by SBE, Inc. All rights reserved.No part of this manual may be reproduced by a

20 Specifications HW400p/M Technical Reference - 1.0, March 6, 2002

HW400p/M Technical Reference - 1.0, March 6, 2002 MPC8245 214. Functional Information4-1. MPC8245Development/debug support Development and debug s

22 Functional Information HW400p/M Technical Reference - 1.0, March 6, 2002Figure 4-1 Voltage keyingFigure 4-2 Voltage key post screwEMI require

HW400p/M Technical Reference - 1.0, March 6, 2002 PCI–to-PCI Bridge 234-3. PCI–to-PCI Bridge PCI interface The PCI bus interface is implemented us

24 Functional Information HW400p/M Technical Reference - 1.0, March 6, 20024-4. LEDsA dual-color board-status LED visible from the front panel of

HW400p/M Technical Reference - 1.0, March 6, 2002 LEDs 25Figure 4-3 Board LEDsDual-colorstatus LEDJ9Ethernet LEDS (4x)RJ45 connectorDebug connect

26 Functional Information HW400p/M Technical Reference - 1.0, March 6, 20024-5. I/O BusThe I/O Bus connects the following functional elements:•DUA

HW400p/M Technical Reference - 1.0, March 6, 2002 Panels 27Flash ROM There are two types of Flash ROM on the HW400p/M:• Two contiguous 512-kByte b

28 Functional Information HW400p/M Technical Reference - 1.0, March 6, 20024-7. I/O Bus Control and Miscellaneous LogicTwo Altera CPLD on the main

HW400p/M Technical Reference - 1.0, March 6, 2002 Connectors 29Power up and reset A microprocessor supervisory manager provides the power up reset

HW400p/M Technical Reference - 1.0, March 6, 2002 Contents 3Contents1. About This Manual ...

30 Functional Information HW400p/M Technical Reference - 1.0, March 6, 2002Table 4-6 PCI connector P1 pin assignmentsABPinPinABNC -12V 1 2 +12V N

HW400p/M Technical Reference - 1.0, March 6, 2002 Connectors 31ABPinPinAB+3.3V AD[07] 53 54 AD[06] +3.3VAD[04] AD[05] 55 56 GND AD[03]AD[02] GND 5

32 Functional Information HW400p/M Technical Reference - 1.0, March 6, 2002MPC8245 debug connector pin assignment. Table 4-7 MPC8245 debug connec

HW400p/M Technical Reference - 1.0, March 6, 2002 COP (Common On-Chip Processor) Support 334-9. COP (Common On-Chip Processor) SupportThe COP func

34 Programming Information HW400p/M Technical Reference - 1.0, March 6, 20025. Programming Information5-1. MPC8245 Memory MapThe MPC8245 local add

HW400p/M Technical Reference - 1.0, March 6, 2002 MPC8245 Memory Map 35Table 5-1 MPC8245 local address space memory mapStart End Size Region Desc

36 Programming Information HW400p/M Technical Reference - 1.0, March 6, 20025-2. Local PCI Address Space MapThe local PCI bus address space is arb

HW400p/M Technical Reference - 1.0, March 6, 2002 Local PCI Address Space Map 37This space is also accessible by the multichannel DMA controller i

38 Programming Information HW400p/M Technical Reference - 1.0, March 6, 2002Table 5-3 Local PCI address spaceStart End Size Region Description0x0

HW400p/M Technical Reference - 1.0, March 6, 2002 High-Density Flash 395-3. High-Density FlashThe HW400p/M supports up to 16 Mbytes of high-densit

4 Contents HW400p/M Technical Reference - 1.0, March 6, 2002PCI interface ...

40 Programming Information HW400p/M Technical Reference - 1.0, March 6, 2002Table 5-4 High-density Flash Total Memory (Mbytes)Number of DevicesNV

HW400p/M Technical Reference - 1.0, March 6, 2002 AMD Ethernet Controller Register Map 415-4. AMD Ethernet Controller Register MapFor the Am79C973

42 Programming Information HW400p/M Technical Reference - 1.0, March 6, 20025-7. CPLD RegistersTable 5-6 I/O registersName Description Address Fu

HW400p/M Technical Reference - 1.0, March 6, 2002 CPLD Registers 43Interrupt Source Register (ISR) The ISR is a 16-bit read-only register that is

44 Programming Information HW400p/M Technical Reference - 1.0, March 6, 2002Interrupt Enable Register A (IERA) The Interrupt Enable Register A (IE

HW400p/M Technical Reference - 1.0, March 6, 2002 CPLD Registers 45Board Status Register (BSR) The BSR controls two board status LEDs on the panel

46 Programming Information HW400p/M Technical Reference - 1.0, March 6, 2002LED Registers (LED) On power up, all LEDs will be off until the LED bi

HW400p/M Technical Reference - 1.0, March 6, 2002 CPLD Registers 47Port Option Register (POR) The Port Option Register (POR) is a read-only regist

48 Programming Information HW400p/M Technical Reference - 1.0, March 6, 2002Board Option Register (BOR) The Board Option Register (BOR) is a read-

HW400p/M Technical Reference - 1.0, March 6, 2002 CPLD Registers 49General Purpose Register (GPR) The General Purpose Register (GPR) is a read/wri

HW400p/M Technical Reference - 1.0, March 6, 2002 Contents 5FiguresFigure 2-1 HW400p/M functional block diagram...

50 Programming Information HW400p/M Technical Reference - 1.0, March 6, 2002

6 Contents HW400p/M Technical Reference - 1.0, March 6, 2002TablesTable 3-1 Operating requirements...

HW400p/M Technical Reference - 1.0, March 6, 2002 Related Documents 71. About This ManualThis manual is the technical reference for the HW400p/M c

8 About This Manual HW400p/M Technical Reference - 1.0, March 6, 20021-2. Documentation ConventionsRegisters Register bits are numbered starting w

HW400p/M Technical Reference - 1.0, March 6, 2002 Functional Components 92. HW400p/M IntroductionThe HW400p/M is a member of SBE’s HighWire™ produ